Basics VHDL project to run on Rysino [PL]

Seris of project coded in VHDL that could be run on Rysino.

1. Logic gates

First project: logic gates

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2. Counter

Counter modulo N implemented in VHDL.

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3. Connect the counters

We use clock enable signal to connect two counters.

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4. Seven segment display

Create controler for seven segment display and connect it with counter.

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